As is well known, a phase-locked loop circuit produces an output signal which tracks an input signal in frequency and exhibits a fixed phase relationship to the input signal. As the input signal changes in frequency, the output signal likewise changes in such a manner as to maintain the phase relationship between the input and output signals. Originally, phase-locked loops were implemented using only analog techniques. These techniques continue in use today in many data processing and communication systems. An analog phase-locked loop circuit typically consists of four fundamental parts; namely, a phase detector, a charge pump, a filter and a voltage controlled oscillator (VCO).
The phase detector is a device which detects the difference in phase between two input signals, and produces an output signal proportional to the amount of the phase difference. In a phase-locked loop circuit the two inputs to the phase detector are the input to the phase-locked loop and the output signal of the VCO, i.e., the output of the phase-locked loop circuit. The output signal from the phase detector is an analog up/down signal, the magnitude of which is representative of the amount of phase difference between the two input signals thereto, hereinafter referred to as an error signal. The charge pump produces a control voltage based on this error signal and outputs the control voltage to the filter, which is disposed at the control input to the VCO. The filter serves to remove any high frequency components from the error signal produced by the charge pump and provides a slowly varying output signal which is representative of the average error in phase between the output signal and the input signal.
The voltage controlled oscillator is an analog oscillator which generates an output signal having a frequency corresponding to the slowly varying control signal across the filter. In one conventional embodiment, the voltage controlled oscillator comprises a voltage-to-current converter which is coupled through a summing node to an oscillator that provides the output signal from an input current. Often, a fixed biased current is also fed to the summing node from an appropriate bias circuit. This bias current, received at a bias input of the VCO, operates to moderate the gain characteristics of the VCO.
Due to the feedback of the VCO output signal to an input of the phase detector, the frequency of the voltage controlled oscillator is adjusted by the VCO input signal, i.e., the control signal across the filter, to maintain the fixed relationship between the input signal and the output signal of the PLL circuit. The filter/VCO components of the PLL circuit define the PLL transfer function. Specifically, the transfer function includes a "pole" and a "zero" provided by the filter. In the complex frequency domain, a pole is defined as a value of infinity, while a zero comprises a null. Often, because of noise it is desirable to extend the useful gain of the PLL's transfer function to higher frequencies, i.e., without introducing instability to the PLL by extending the useable frequency range too far. Unfortunately, existing PLL circuit designs provide limited flexibility in this regard. Thus, the present invention is directed to addressing this deficiency.